date: 2002/10/04 1/1 hitachi semiconductor technical update classification of production memory no tn-m62-112a/e rev 1 theme sram: notes on usage classification of information 1. spec change 2. supplement of documents 3. limitation of use 4. change of mask 5. change of production line lot no. effective date product name all 4-mbit fast sram c-mask products all lots reference documents hitachi ic memory datasheets ade-203-1196b(z)/1198b(z)/1199b(z)/ 1200c(z)/1294d(z)/1202c(z)/1263a(z) /1283a(z)/1304a(z)/1305a(z) permanent as the operating speeds of sram products rise, securing the various design margins is becoming more difficult. accordingly, there is an increasing possibility of noise fr om the input-signal or power-supply lines acting as an obstacle to the normal operation of sram products. to prevent malfunctions in 4-mbit fast sram (c-mask) products, please note the following points. 1. announcement in executing a write-with-ver ify operations with a 4-mbit fast sr am (c-mask) product, incorrect data may be read because of noise, etc., even when the da ta has been written correct ly (see figure 1 and note 1). this problem does not arise w ith a further read operation. if you are having problems of the type described or your project may be subject to such pr oblems, refer to the points below for the appropriate countermeasures. 2. countermeasures please apply countermeasures (1) and (2) below according to your situation. (1) avoid executing the read for verifica tion in the same cycle as the write operation it foll ows. verify the written data after inputting an ad dress or switching the /cs signal. (2) please ensure that your design is no t subject to adverse effects becaus e of distortion or skewing of the din input waveform (figure 2). drive /we low (write ) after determining the data on din (see figure 3). time din waveform skew figure 2 din input waveform distortion of input waveform input threshold voltage *1: write verify : after data is written within the same address cycle, perform data-read operation. figure 1. write verify timing add /cs /we din strb fixed to a low level /d d read operation /oe /we din /d d after the din data is determined, drive /we low. figure 3 write verify timing (countermeasure applied) voltage
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